In the semiconductor industry, there is a continuing trend toward higher device densities. To achieve these higher densities there has been, and continues to be, efforts toward scaling down and packing more devices on semiconductor wafers. In order to accomplish higher device packing densities, the respective sizes of features making up these devices have to be reduced. This may include reducing the width and spacing of interconnecting lines and the surface geometry such as the corners and edges of various features.
The requirement of small features with close spacing between adjacent features requires high resolution photolithographic processes. In general, lithography refers to processes for pattern transfer between various media. With regard to semiconductor fabrication, lithography generally relates to the process of transferring patterns which correspond to desired circuit components onto one or more thin films which overlie a substrate.
In particular, a silicon slice (e.g., a wafer) is typically uniformly coated with one or more thin films and a radiation-sensitive material (e.g., a resist) is formed over these films. The coated substrate can be baked to evaporate solvents in the resist composition and to fix the resist coating upon the films and substrate. An imaging source (e.g., light, x-rays, an electron beam) can then be utilized to expose or illuminate selected areas of the surface of the resist material through an intervening master template (e.g., a mask or reticle) to transfer a pattern formed within the template onto the wafer. The resist material is generally a radiation-sensitized coating suitable for receiving a projected image of the subject pattern. Once the image from the intervening master template is projected onto the resist coating, it is indelibly formed therein.
Light projected onto the resist layer during the photolithographic process changes properties (e.g., solubility) of the layer of resist material such that different portions thereof (e.g., illuminated or un-illuminated areas, depending upon the type of resist utilized) can be manipulated in subsequent processing steps. For example, regions of a negative resist become insoluble when illuminated by an exposure source such that the application of a solvent to the resist during a subsequent development stage removes only non-illuminated regions of the resist. The pattern formed in the negative resist layer is, thus, the negative of the pattern defined by opaque regions of the template. By contrast, in a positive resist, illuminated regions of the resist become soluble and are removed via application of a solvent during development. Thus, the pattern formed in the positive resist is a positive image of opaque regions on the template.
By way of example, a cross-sectional side view of a portion of one or more layers of a wafer 100 whereon one or more semiconductor structures are produced is illustrated in the FIGS. 1–6. In FIG. 1, a resist layer 102 is deposited over a thin film 104, such as via spin-coating, for example. The thin film 104 may include, for example, silicon dioxide (SiO2) and overlies a substrate 106 that can comprise silicon, for example. In FIG. 2, the resist layer 102 is selectively exposed to radiation 108 (e.g., ultraviolet (UV) light) via one or more apertures 110 formed within an intervening mask or reticle 112 to generate one or more exposed regions 114 within the resist layer 102.
When the exposed regions 114 are made soluble, a positive image of the mask 112 is produced in the resist layer 102. These features 114 are revealed when a specific solvent or developer is subsequently applied across the wafer 100 as illustrated in FIG. 3. In this situation, the resist material is referred to as a “positive resist”. Areas 116 of the film 104 underlying the removed regions 114 of the resist layer 102 may then be subjected to further processing (e.g., etching) to thereby transfer the desired pattern from the mask 112 to the film 104, as illustrated in FIG. 4 (wherein the remaining portions of the resist layer 102 have been stripped away or otherwise removed).
Conversely, when the exposed regions 114 are made insoluble by radiation, a negative image of the mask 112 is produced in the resist layer 102. These features 114 remain when the rest of the resist layer 102 is removed via application of a specific solvent or developer across the wafer 100, as is illustrated in FIG. 5. In this situation, the resist material is referred to as a “negative resist.” Revealed areas 118 in the film 104 may then be subjected to further processing (e.g., etching) to thereby transfer into the film 104 desired features 120 from the mask 112, as illustrated in FIG. 6 (wherein the remaining portions of the resist layer 102 have once again been stripped away or otherwise removed).
It can be appreciated that projection lithography is a powerful and important tool in integrated circuit manufacturing, and that to further increase the packing density of integrated circuits, the accuracy with which an image can be positioned upon the surface of a semiconductor substrate and/or one or more thin films formed thereon is of considerable importance. Because integrated circuits are fabricated by patterning a plurality of layers in a particular sequence to generate features that require a particular spatial relationship with respect to one another, each layer must be properly aligned with respect to previously patterned layers. The more accurately layers can be aligned, the more likely it is that packing density can be effectively increased.
Historically, three primary methods have been utilized to optically transfer a pattern to a photoresist covered film. These methods include: contact printing, proximity printing and projection printing and are illustrated in simplified form in FIGS. 7–10, respectively. Each of the methods generally make use of: (1) an illumination source which provides optical energy (e.g., UV light) for transforming the photoresist via exposure, (2) an optical subsystem that focuses the circuit patterns onto the photoresist surface and allows for controlled exposure times, and (3) a movable stage that holds the wafer being exposed.
Contact printing 700, as illustrated in FIG. 7, was the earliest method utilized to produce patterns. Contact printing 700 involves a light source 702, an optical system 704, a mask 706 and a photoresist layer 708 overlying a thin film 710 which, in turn, overlies a semiconductor wafer 720. The mask 706, which contains the desired circuit patterns for transfer to the photoresist layer 708, is positioned (aligned) relative to any existing patterns that already exist on the wafer 720. The mask 706 is then clamped down to the photoresist layer 708, thereby making physical contact with the photoresist layer 708, and exposed with ultraviolet (UV) light from the light source 702. This method provides for an excellent image transfer and good resolution (e.g., good minimum linewidth spacing).
Contact printing can, however, suffer from the direct contact made between the mask 706 and the photoresist layer 708. For example, the repeated contact made between the mask 706 and the photoresist layer 708 in the process can result in defects being generated within the mask 706 which can in turn then be transferred to subsequently processed wafers. To prevent this problem, the masks 706 must be inspected and cleaned regularly which can be disadvantageous, at least, in terms of cost and processing time. In addition, small particles may be caught between the mask 706 and the photoresist layer 708 when affixing the two elements, thereby preventing the desired direct contact between the mask 706 and the photoresist layer 708. This particulate contamination can result in reduced resolution in the area local to the foreign particle. Consequently, contact printing is not common in modern semiconductor fabrication.
Proximity printing 800, as illustrated in FIG. 8, again made use of a light source 802, an optical system 804, a mask 806 and a photoresist layer 808 overlying a thin film 810 which overlies a semiconductor wafer 820. In proximity printing, the mask 806 is placed near, but not in contact with, the surface of the wafer 820. By introducing a gap 822 between the mask 806 and the wafer 820, the defect problem of contact printing is substantially avoided. Unfortunately, as the gap 822 increases, the resolution of the proximity printing system 800 rapidly deteriorates. For example, a 10 micrometer gap with a 400 nanometer exposure (the wavelength of the light source 802) results in a minimum resolution of about 3 micrometers. In addition, proximity printing 800 requires extremely flat masks 806 and wafers 820 in order to prevent gap variations spatially about the wafer 820. Since many integrated circuits today require features of 0.25 micrometers or less, proximity printing 800 is not considered adequate for many modern semiconductor fabrication processes.
The final optical pattern transfer technique of projection printing is a generic term that encompasses various pattern transfer techniques. These techniques, for example, include: (a) projection scanning systems, (b) reduction (e.g., 4× or 10×) step-and-repeat projection systems, and (c) reduction step-and-scan systems. In each system, lens elements or mirrors are utilized to focus the mask image on the wafer surface (containing the photoresist).
Projection scanning systems (often called scanning projection aligners), use a reflective spherical mirror (reflective optics) to project an image onto the wafer surface, as illustrated, for example, in FIG. 9. The system 900 includes a primary mirror 902 and a secondary mirror 904 which are arranged with the mask 906 and the wafer 908 to image the mask pattern onto the photoresist layer which overlies the film on the wafer 908 (the photoresist layer and the thin film are not shown in FIG. 9 for simplicity). A narrow arc of radiation is imaged from the mask 906 to the wafer 908 through a slit (not shown) with light that travels an optical path that reflects the light multiple times. The mask 906 and the wafer 908 are scanned through the arc of radiation by means of a continuous scanning mechanism (not shown). The scanning technique minimizes mirror distortions and aberrations by keeping the imaging illumination in the “sweet spot” of the imaging system 902 and 904.
FIG. 10 illustrates an exemplary reduction step-and-repeat system 1000 (also called a reduction stepper) that utilizes refractive optics (as opposed to reflective optics as illustrated in FIG. 9) to project a mask image onto a photoresist layer which overlies the film on the wafer 1002. It will be appreciated that the photoresist layer and thin film are not shown in FIG. 10 for purposed of simplicity. The reduction stepper 1000 generally includes a mirror 1004, a light source 1006, a filter 1008, a condenser lens system 1010, a reticle 1012 and a reduction lens system 1014. The mirror 1004 behaves as a collecting optics system to direct as much of the light from the light source 1006 (e.g., a mercury-vapor lamp) to the wafer 1002. The filter 1008 is used to limit the light exposure wavelengths to specified frequencies and bandwidth. The condenser system 1010 focuses the radiation through the reticle 1012 and to the reduction lens system 1014 to thereby focus a “masked” radiation exposure onto a limited portion of the wafer 1002, namely onto a single semiconductor die 1016.
Since it is complex and expensive to produce a lens capable of projecting a mask pattern of an entire 200 millimeter or 300 millimeter wafer, the refractive system 1000, as illustrated in FIG. 10, projects an image 1020 only onto a portion of the wafer 1002 corresponding to an individual semiconductor die 1016. This image is then stepped and repeated across the wafer 1002 in order to transfer the pattern to the entire wafer (thus giving rise to the name “steppers”). Consequently, the size of the wafer is no longer a consideration for the system optics.
The reduction stepper system 1000 thus uses the reticle 1012 instead of a mask. Reticles are similar to masks, but differ in that a mask contains a pattern for transfer to the entire wafer in one exposure while a reticle contains a pattern image for a single or several semiconductor die that must be stepped and repeated across the wafer 1002 in order to expose the entire wafer substrate. The terms “mask” and “reticle” are increasingly used interchangeably and are so used hereinafter. Conventional reduction stepper systems such as the system 1000 utilize reticles that contain a pattern that is an enlargement of the desired image on the wafer 1002 to allow more detailed and accurate patterns to be formed therein. Consequently, the reticle pattern 1020 is reduced in size when projected onto the wafer 120 during exposure (thus giving rise to the name “reduction” stepper).
In addition to stepper systems, scanning step and repeat systems (often called “step and scan systems”) have become popular, a simplified example of which 1100 is illustrated in FIG. 11. Step and scan systems differ from scanning systems, such as that depicted in FIG. 9 because instead of the entire wafer being scanned with a mask, each die on the wafer is scanned with a reticle and the system then steps across the wafer and scans each die across the wafer. In FIG. 11, for example, a reticle 1102 having a pattern 1104 formed thereon and a substrate subsystem 1106, including a reduction lens 1108, among other things, are positionally fixed with respect to one another, and the reticle/substrate subsystem 1106 are laterally scanned in the X-direction across a slit 1110 aligned with an illumination system 1112 by laterally moving the subsystem 1106. Consequently, in the step and scan system 1100, the entire reticle field is not printed at one time, but rather the portion of the reticle field underneath the slit 1110 is printed and the slit 1110 is scanned across the reticle field by the lateral movement of the reticle/substrate subsystem 1106. In this manner, the exposed portion of the reticle field is always within the same fixed portion of the image field in order to maintain the printing within the “sweet spot” of the imaging optics.
Although step and scan systems constitute an improvement in pattern transfer quality, the scanning process can contribute to pattern transfer errors in one or more directions (e.g., the X-direction)) if the subsystem 1106 positioning is not proper for each scan. For example, if the repeated scans of the subsystem 1106 past the slit 1110 are crooked or misaligned or the position of the subsystem 1106 is rotated slightly from its desired position in the “X-Y” plane, errors may be generated in the transferring of the reticle pattern 1104 to the wafer 1120, and more particularly to one or more die 1122 on the wafer 1120. Furthermore, instability in such scanning systems can lead to errors in pattern transfer.
Accordingly, pattern transfers in semiconductor fabrication generally incorporate some type of alignment mechanism to assist with layer to layer alignment during pattern transfer. One technique that facilitates overlay accuracy involves forming one or more alignment marks or patterns on the underlying substrate and each mask. When the alignment marks or patterns on the substrate and mask are optically aligned, for example, then the remainder of the circuit patterns are assumed to be aligned. Another technique utilizes one or more recesses or other features formed within a semiconductor substrate as alignment marks. For example, FIG. 12 illustrates an enlarged fragmentary cross section of a substrate such as a portion of a silicon wafer 1200 having one or more recesses 1202 formed therein which can serve as alignment marks. The recesses 1202 have respective depths 1204 which are functionally related to an alignment radiation wavelength (e.g., a depth of lambda/4). The predetermined depths 1204 provide a diffraction pattern or other destructive interference phenomena upon reflection of a beam of radiation (e.g., white light) off of the marks 1202 which allows the alignment marks 1202 to be more effectively “seen”. In this manner, the alignment marks 1202 exhibit a better reflective contrast than the neighboring regions and are thus more visible.
FIG. 13 is a schematic block diagram illustrating a conventional alignment system 1300 utilizing alignment marks 1302, such as that depicted in FIG. 12. An alignment light source 1304 illuminates the grating or plurality of alignment marks 1302 with radiation 1306 and this radiation 1306 has its diffracted orders 1308 reflect off of the alignment marks 1302 and get captured by a lens 1310 and directed toward a mask 1312. The reflected radiation is used as a signal to detect the alignment between the mask 1312 and substrate 1314 containing the marks 1302. As will become apparent in the discussion that follows, however, conventional alignment mark structures suffer from some disadvantages which prevent alignment accuracy from being maximized. There is thus a need in the art for improved alignment structures, systems and techniques.